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CPLD FLASH370i 系列 1.6K 门 64 宏电池 5V 44针 PLCC
订购指南:
特性
•64个宏单元在四个逻辑块
•32个I/O引脚
•五个专用输入,包括两个时钟引脚
•系统内可编程(ISR™)闪存技术
- JTAG接口
•所有I/ o和专用输入的总线保持能力
•没有隐藏的延迟
•高速
—fMAX = 125 MHz
- tPD = 10ns
- tS = 5.5 ns
- tCO = 6.5 ns
•完全符合PCI标准
•3.3V或5.0V I/O操作
•可在44引脚PLCC, TQFP和CLCC封装
•与CY7C371i引脚兼容
Product Technical Specifications
EU RoHS | Not Compliant |
Part Status | Obsolete |
Automotive | No |
PPAP | No |
Family Name | FLASH370i |
Program Memory Type | Flash |
Number of Logic Blocks/Elements | 4 |
Number of Global Clocks | 2 |
Number of Macro Cells | 64 |
Product Terms | 16 |
Device System Gates | 1600 |
Data Gate | No |
Maximum Number of User I/Os | 32 |
In-System Programmability | Yes |
Programmability | Yes |
Reprogrammability Support | Yes |
Maximum Clock to Output Delay (ns) | 10 |
Maximum Propagation Delay Time (ns) | 20 |
Speed Grade | 66 |
Individual Output Enable Control | No |
Minimum Operating Supply Voltage (V) | 4.75 |
Maximum Operating Supply Voltage (V) | 5.25 |
Typical Operating Supply Voltage (V) | 5 |
I/O Voltage (V) | 3.3|5 |
Maximum Operating Current (mA) | 125 |
Minimum Operating Temperature (°C) | 0 |
Maximum Operating Temperature (°C) | 70 |
Supplier Temperature Grade | Commercial |
Mounting | Surface Mount |
Package Height | 3.68(Min) |
Package Width | 16.71(Max) |
Package Length | 16.71(Max) |
PCB changed | 44 |
Standard Package Name | LCC |
Supplier Package | PLCC |
Pin Count | 44 |
Lead Shape | J-Lead |